Yatin Trivedi

Yatin Trivedi
Chairman

Service Line Executive, Aricent Inc.

Yatin Trivedi is a Service Line Executive with Aricent, Inc. He serves as the Chairman of the Board of Directors of ISTO and the Treasurer and member of the Board of Governors of the IEEE Standards Association (IEEE-SA). He has also served on the Education Activities Board (EAB) since 2012. He is the Editor-in-Chief of Standards Education Committee eZine and vice chair of Design Automation Standards Committee (DASC).

Yatin has been in engineering, marketing and management roles in the semiconductor industry for 30 years. He has worked with semiconductor IP and library suppliers, and EDA tool vendors to establish comprehensive supply chain solutions for SoC design implementation and analysis flows. As Director of Standards and Interoperability Programs at Synopsys he managed interoperability initiatives under corporate strategic marketing group, and worked closely with the Synopsys University program.

In 1992, Yatin co-founded Seva Technologies as one of the early IC Design Services companies in Silicon Valley. He co-authored the first book on Verilog HDL in 1990 and served as the editor of IEEE Std 1364-1995 and IEEE Std 1364-2001. He also started, managed, and taught courses in VLSI design engineering at UC Santa Cruz extension (1990-2001). Yatin began his career at AMD and worked at Sun Microsystems (acquired by Oracle). He has been a qualified ABET Program Evaluator for Computer Engineering program since 2013.

Yatin received his B.E. (Hons) EEE from BITS, Pilani and M.S. Computer Engineering from Case Western Reserve University, Cleveland. He is a Senior Member of the IEEE. He was inducted to IEEE’s honor society IEEE-HKN (Eta Kappa Nu) in 2014.

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